Professor Yeh-Ching Chung’s team includes one professor, one postdoctoral fellow, one engineer, five doctoral students, three master students and several undergraduate students. The research direction includes parallel and distributed computing, system security, graph computing, compiler, in-memory computing, and big data.

Research introduction:

(1) System security research

Our security research mainly focuses on system integrity protection, code anti-probing defense, and code polymorphism distribution. Recently, we have proposed a kernel rootkit defense method Virtual Wall (VirtWall) for kernel integrity protection. VirtWall is essentially a lightweight hypervisor with security features. It uses hardware virtualization technology to divide the operating system into two permission modes: "guest" and "host". VirtWall uses EPT technology to control memory access, and establishes an event injection mechanism to intervene in the code execution path in "guest" mode. Combining memory access control and event injection mechanisms, VirtWall can track the execution process of the target LKM and prevent the destruction of kernel rootkits. At the same time, by tracking the jump control flow, VirtWall can trace back all execution entities related to the current attack. Its overall structure is shown in Figure 1. At present, the research has been accepted by IEEE Transactions on Computers, the top publication in the field of computer systems.

Figure 1. Architecture of VirtWall

(2) Corder: Cache-aware Reordering for Optimizing Graph Analytics

The intrinsic irregular data structure of graphs often causes poor cache utilization thus deteriorates the performance of graph analytics. Prior works have designed a variety of graph reordering methods to improve cache efficiency. However, little insight has been provided into the issue of workload imbalance for multicore systems. In this work, we identify that a major factor affecting the performance is the unevenly distributed computation loads amongst cores. To cope with this problem, we propose cache-aware reordering (Corder), a lightweight reordering algorithm that facilitates workload balance as well as cache optimization. Comprehensive performance evaluation of Corder is conducted on various graph applications and datasets. We observe that Corder yields speedup of up to 2.59× (on average 1.47×) over original graphs.

Figure 2 Conceptual Design of Corder

Contact Person: Shenen Liu

Contact Number: 15065705095

Contact Email: liushenen@cuhk.edu.cn